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L5985 Scheda tecnica(PDF) 25 Page - STMicroelectronics

Il numero della parte L5985
Spiegazioni elettronici  2A step-down switching regulator
PDF  36 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L5985 Scheda tecnica(HTML) 25 Page - STMicroelectronics

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L5985
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5.5
Thermal considerations
The thermal design is important to prevent the thermal shutdown of device if junction
temperature goes above 150°C. The three different sources of losses within the device are:
a)
conduction losses due to the not negligible RDSON of the power switch; these are
equal to:
Equation 27
Where D is the duty cycle of the application and the maximum RDSON is 300mΩ.
Note that the duty cycle is theoretically given by the ratio between VOUT an VIN, but actually
it is quite higher to compensate the losses of the regulator. So the conduction losses
increases compared with the ideal case.
b)
switching losses due to power MOSFET turn ON and OFF; these can be
calculated as:
Equation 28
Where TRISE and TFALL are the overlap times of the voltage across the power switch (VDS)
and the current flowing into it during turn ON and turn OFF phases, as shown in Figure 16.
TSW is the equivalent switching time. For this device the typical value for the equivalent
switching time is 50ns.
c)
Quiescent current losses, calculated as:
Equation 29
where IQ is the quiescent current. (IQ = 20uA)
The junction temperature TJ can be calculated as:
Equation 30
Where TA is the ambient temperature and PTOT is the sum of the power losses just seen.
RthJA is the equivalent thermal resistance juction to ambient of the device; it can be
calculated as the parallel of many paths of heat conduction from the junction to the ambient.
For this device the path through the exposed pad is the one conducting the largest amount
of heat. The RthJA measured on the application demo board described in the following
paragraph is about 60°/W.
P
ON
R
DSON
I
OUT
()
2
D
⋅⋅
=
P
SW
V
IN
I
OUT
T
RISE
T
FALL
+
()
2
------------------------------------------- Fsw
⋅⋅
V
IN
I
OUT
T
SW
F
SW
⋅⋅
==
P
Q
V
IN
I
Q
=
T
J
T
A
Rth
JA
P
TOT
+
=



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