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TLK1221 Scheda tecnica(PDF) 11 Page - Texas Instruments

Il numero della parte TLK1221
Spiegazioni elettronici  ETHERNET TRANSCEIVER
PDF  21 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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TLK1221 Scheda tecnica(HTML) 11 Page - Texas Instruments

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TLK1221
www.ti.com....................................................................................................................................... SLLS713C – FEBRUARY 2007 – REVISED SEPTEMBER 2009
LVTTL OUTPUT SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tr(RBC)
Clock rise time
0.3
1.5
ns
tf(RBC)
Clock fall time
0.3
1.5
ns
80% to 20% output voltage, C = 5 pF (see Figure 9)
tr
Data rise time
0.3
1.5
ns
tf
Data fall time
0.3
1.5
ns
TBI normal mode (see Figure 3), Rω = 125 MHz, data valid prior
2.5
ns
to RBC0 rising
tsu(d1)
Data setup time (RD0–RD9)
TBI normal mode (see Figure 3), Rω = 61.44 MHz, data valid
5
ns
prior to RBC0 rising
TBI normal mode (see Figure 3), Rω = 125 MHz, data valid after
2
ns
RBC0 rising
th(d1)
Data hold time (RD0–RD9)
TBI normal mode (see Figure 3), Rω = 61.44 MHz, data valid
4
ns
after RBC0 rising
tsu(d3)
Data setup time (RD0–RD9)
TBI half-rate mode, Rω = 125 MHz (see Figure 2)
2.5
ns
th(d3)
Data hold time (RD0–RD9)
TBI half-rate mode, Rω = 125 MHz (see Figure 2)
1.5
ns
TRANSMITTER TIMING REQUIREMENTS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tsu(d4)
Data setup time (TD0–TD9)
1.6
ns
th(d4)
Data hold time (TD0–TD9)
0.8
ns
tr, tf
TD[0,9] data rise and fall time
See Figure 9
2
ns
Table 3. AVAILABLE OPTIONS
TA
PACKAGE
QFN PLASTIC QUAD FLAT PACK (RHA)
–40°C to 85°C
TLK1221RHA
Copyright © 2007–2009, Texas Instruments Incorporated
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