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TPS75201MPWPREP Scheda tecnica(PDF) 2 Page - Texas Instruments |
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TPS75201MPWPREP Scheda tecnica(HTML) 2 Page - Texas Instruments |
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2 / 28 page ![]() RESET OUT OUT 4 3 5 IN IN EN GND 17 6 8 9 VI 0.22 µF RESET Output VO 47 µF + CO † SENSE 7 T − J Junction Temperature − C ° −40 10 110 60 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 300 160 250 200 150 100 50 0 IO = 0.5 A IO = 1.5 A IO = 2 A t − Time − ms LOAD TRANSIENT RESPONSE −150 3 2 1 4 5 7 6 8 9 10 0 0 0 50 −50 IL = 2 A CL = 100 µF (Tantalum) VO = 3.3 V −100 2 1 TPS75201M-EP SGLS325A – JANUARY 2006 – REVISED JULY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION(1) OUTPUT VOLTAGE TJ PACKAGE(2) ORDERABLE PART NUMBER (TYP) –55°C to 125°C Adjustable 1.5 V to 5 V TSSOP – PWP Tape and reel TPS75201MPWPREP (1) The TPS75201M-EP is programmable using an external resistor divider (see Application Information). (2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. †See application information section for capacitor selection details. Figure 1. Typical Application Configuration (for Fixed-Output Options) 2 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated Product Folder Links :TPS75201M-EP |
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