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74ACT109PC Scheda tecnica(PDF) 6 Page - ON Semiconductor

Il numero della parte 74ACT109PC
Spiegazioni elettronici  Dual JK Positive Edge-Triggered Flip-Flop
PDF  12 Pages
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Produttore elettronici  ONSEMI [ON Semiconductor]
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74ACT109PC Scheda tecnica(HTML) 6 Page - ON Semiconductor

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©1988 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74AC109, 74ACT109 Rev. 1.5
6
AC Electrical Characteristics for AC
Note:
6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V.
AC Operating Requirements for AC
Note:
7. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V
Symbol
Parameter
VCC (V)
(6)
TA = +25°C,
CL = 50pF
TA = –40°C to +85°C,
CL = 50pF
Units
Min.
Typ.
Max.
Min.
Max.
fMAX
Maximum Clock Frequency
3.3
125
150
100
MHz
5.0
150
175
125
tPLH
Propagation Delay,
CPn to Qn or Qn
3.3
4.0
8.0
13.5
3.5
16.0
ns
5.0
2.5
6.0
10.0
2.0
10.5
tPHL
Propagation Delay,
CPn to Qn or Qn
3.3
3.0
8.0
14.0
3.0
14.5
ns
5.0
2.0
6.0
10.0
1.5
10.5
tPLH
Propagation Delay,
CDn or SDn to Qn or Qn
3.3
3.0
8.0
12.0
2.5
13.0
ns
5.0
2.5
6.0
9.0
2.0
10.0
tPHL
Propagation Delay,
CDn or SDn to Qn or Qn
3.3
3.0
10.0
12.0
3.0
13.5
ns
5.0
2.0
7.5
9.5
2.0
10.5
Symbol
Parameter
VCC (V)
(7)
TA = +25°C,
CL = 50pF
TA = –40°C to +85°C,
CL = 50 pF
Units
Typ.
Guaranteed Minimum
tS
Setup Time, HIGH or LOW,
Jn or Kn to CPn
3.3
3.5
6.5
7.5
ns
5.0
2.0
4.5
5.0
tH
Hold Time, HIGH or LOW,
Jn or Kn to CPn
3.3
–1.5
0
0
ns
5.0
–0.5
0.5
0.5
tW
Pulse Width, CDn or SDn
3.3
2.0
7.0
7.5
ns
5.0
2.0
4.5
5.0
tREC
Recovery Time,
CDn or SDn to CPn
3.3
–2.5
0
0
ns
5.0
–1.5
0
0



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