| Motore di ricerca datesheet componenti elettronici |
|
LP3892 Scheda tecnica(PDF) 4 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
LP3892 Scheda tecnica(HTML) 4 Page - Texas Instruments |
|
4 / 19 page ![]() LP3892 SNVS236D – SEPTEMBER 2003 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS Limits in standard typeface are for TJ = 25°C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, VBIAS = 4.5V, IL = 10 mA, CIN = COUT = 10µF, VS/D = VBIAS. Typical Symbol Parameter Conditions MIN (1) MAX (1) Units (2) VO Output Voltage Tolerance 10 mA ≤ IL≤ 1.5A, 1.198 1.234 1.216 VO(NOM) + 1V ≤ VIN ≤ 5.5V, 1.186 1.246 4.5V ≤ VBIAS ≤ 6V 1.478 1.522 1.5 V 1.455 1.545 1.773 1.827 1.8 1.746 1.854 ΔVO/ΔVIN Output Voltage Line Regulation(3) (4) VO(NOM) + 1V ≤ VIN ≤ 5.5V 0.01 %/V ΔVO/ΔIL Output Voltage Load Regulation (5) 10 mA ≤ IL≤ 1.5A 0.04 %/A 0.06 VDO Dropout Voltage (6) IL = 1.5A (TO-220 and DDPAK/TO-263 320 140 only) 500 mV IL = 1.5A (SO PowerPAD only) 340 155 550 IQ(VIN) Quiescent Current Drawn from VIN 10 mA ≤ IL≤ 1.5A 7 3 mA Supply 8 VS/D ≤ 0.3V 1 0.03 µA 30 IQ(VBIAS) Quiescent Current Drawn from VBIAS 10 mA ≤ IL≤ 1.5A 2 1 mA Supply 3 VS/D ≤ 0.3V 1 0.03 µA 30 ISC Short-Circuit Current VOUT = 0V 4.3 A Shutdown Input VSDT Output Turn-off Threshold Output = ON 1.3 0.7 V Output = OFF 0.7 0.3 Td (OFF) Turn-OFF Delay RLOAD X COUT << Td (OFF) 20 µs Td (ON) Turn-ON Delay RLOAD X COUT << Td (ON) 15 IS/D S/D Input Current VS/D =1.3V 1 µA VS/D ≤ 0.3V −1 AC Parameters PSRR Ripple Rejection for VIN Input Voltage VIN = VOUT +1V, f = 120 Hz 80 (VIN) VIN = VOUT + 1V, f = 1 kHz 65 dB PSRR Ripple Rejection for VBIAS Voltage VBIAS = VOUT + 3V, f = 120 Hz 70 (VBIAS) VBIAS = VOUT + 3V, f = 1 kHz 65 Output Noise Density f = 120 Hz µV/root − 1 Hz en Output Noise Voltage BW = 10 Hz − 100 kHz, VOUT = 1.8V 150 µV (rms) BW = 300 Hz − 300 kHz, VOUT = 1.8V 90 (1) Limits are specified through testing, statistical correlation, or design. (2) Typical numbers represent the most likely parametric norm for 25°C operation. (3) If used in a dual-supply system where the regulator load is returned to a negative supply, the output pin must be diode clamped to ground. (4) Output voltage line regulation is defined as the change in output voltage from nominal value resulting from a change in input voltage. (5) Output voltage load regulation is defined as the change in output voltage from nominal value as the load current increases from no load to full load. (6) Dropout voltage is defined as the minimum input to output differential required to maintain the output with 2% of nominal value. The SO PowerPAD-8 package devices have a slightly higher dropout voltage due to increased band wire resistance. 4 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links: LP3892 |
|
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |