Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

CL

Maximum capacitive load

No sustained oscillation

2.2

nF

OFFSET ADJUSTEMENT

RT

Reference voltage rejection

ratio, RTI (3)

TSC240A1

20

µV/V

Acc

Reference divider accuracy

VREF1 = VCC, VREF2 = GND, VSENSE = 0 mV

Tmin < T < Tmax

0.02

0.1

%

Dynamic performances

BW

CL = 5 pF

-3dB bandwidth

Tmin < T < Tmax

300

300

560

kHz

0.5% THD-N

100

SR

Slew rate

VICM = 12 and 48 V

Tmin < T < Tmax

1.4

1.2

2

V/µs

TS

Settling time

Up to 0.5% of final value

5

µs

PWM rejection, settling time

VICM = [0, 48 V], rise/fall time = 20 ns

Up to 0.5% of final value

2.5

µs

Noise, RTI

En

Voltage noise density

50

nV/√Hz

1. Guaranteed by design and characterization on a sample of parts, not tested in production.

2. VSENSE = (VIN+) – (VIN-).

3. RTI stands for “Related to input”.

TSC240

Electrical characteristics

DS15039 - Rev 1

page 5/22