BQ40Z50RSMR-R2 datasheet(37/55 Pages) TI2

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9.2.2.3.1 Cell and Battery Inputs

Each cell input is conditioned with a simple RC filter, which provides ESD protection during cell connect and acts

to filter unwanted voltage transients. The resistor value allows some trade-off for cell balancing versus safety

protection.

The integrated cell balancing FETs enable the AFE to bypass cell current around a given cell or numerous cells,

effectively balancing the entire battery stack. External series resistors placed between the cell connections and

the VCx I/O pins set the balancing current magnitude. The internal FETs provide a 200-Ω resistance (2 V < VDS

< 4 V). Series input resistors between 100 Ω and 300 Ω are recommended for effective cell balancing.

The BAT input uses a diode (D1) to isolate and decouple it from the cells in the event of a transient dip in voltage

caused by a short-circuit event.

Also, as described in Section 9.2.2.1, the top and bottom nodes of the cells must be sensed at the battery

connections with a Kelvin connection to prevent voltage sensing errors caused by a drop in the high-current PCB

copper.

Figure 9-12. Cell and BAT Inputs

9.2.2.3.2 External Cell Balancing

Internal cell balancing can only support up to 10 mA. External cell balancing is provided as another option for

faster cell balancing. For details, refer to the application note, Fast Cell Balancing Using External MOSFET

(SLUA420).

9.2.2.3.3 PACK and FET Control

The PACK and VCC inputs provide power to the BQ40Z50-R2 device from the charger. The PACK input also

provides a method to measure and detect the presence of a charger. The PACK input uses a 10-kΩ resistor;

whereas, the VCC input uses an internal diode to guard against input transients and prevent a misoperation of

the gate driver during short-circuit events.

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BQ40Z50-R2

SLUSCS4C – JUNE 2017 – REVISED APRIL 2021

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