| Motore di ricerca datesheet componenti elettronici |
|
L9805E Scheda tecnica(PDF) 97 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9805E Scheda tecnica(HTML) 97 Page - STMicroelectronics |
|
97 / 125 page ![]() L9805E On-chip peripherals 97/125 Note: The DIR signal is internally synchronized with the PWM1 and PWM2 signals according to the selected Driving Mode. After writing the DIR bit in PBCSR register, the direction changes in correspondence with the first rising edge of PWM1. The same procedure is used in the case of PWM2. This allows the proper control of the direction changes. When the PWM signal is 0% or 100%, being no edges available, the DIR bit can’t be latched and the direction does not change until a PWM edge occurs. 1 1 0 0 0 1 0 1 0 1 BRAKE Full Bridge 1 1 0 1 0 1 1 0 0 1 FORWARD Full Bridge 1 1 1 0 0 1 0 1 0 1 BRAKE Full Bridge 1 1 1 1 0 1 0 1 1 0 BACK Full Bridge 1 1 0 0 1 0 0 1 1 0 BACK Full Bridge 1 1 0 1 1 0 1 0 0 1 FORWARD Full Bridge 1 1 1 0 1 0 1 0 0 1 FORWARD Full Bridge 1 1 1 1 1 0 0 1 1 0 BACK Full Bridge 1 1 0 1 1 pwm1 pwm1 pwm2 pwm2 PWM1 ->left PWM2->right Two Half Bridges 11 1 1 1 pwm1 pwm1 pwm2 pwm2 PWM1 ->left PWM2->right Two Half Bridges Table 15. Functional description (continued) Drive EN PWM_EN DIR PWM1 IN1 IN2 UL DL UR DR Operation Configuration |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |