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D950-CORE Scheda tecnica(PDF) 11 Page - STMicroelectronics |
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D950-CORE Scheda tecnica(HTML) 11 Page - STMicroelectronics |
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11 / 89 page ![]() 11/89 D950-Core 3 FUNCTIONAL OVERVIEW The D950-CORE is composed of three main units. • Data Calculation Unit (DCU) • Address Calculation Unit (ACU) • Program Control Unit (PCU) These units are organized in an HARVARD architecture around three bidirectional 16-bit buses, two for data and one for instruction. Each of these buses is dedicated to an uni- directional 16-bit address bus (XA/YA/IA). An 8-bit general purpose parallel port (P0-P7) can be configured (input or output). A test condition is attached to each bit to test external events. Each of these functional blocks are discussed in detail in Section 4“BLOCK DESCRIPTION”. Control of the chip is performed through interface pins related to interrupt, low-power mode, reset and miscellaneous functions. Clock input is provided on the CLKIN pin which is buffered to the output clocks. Figure 3.1 Block Diagram DATA CALCULATION UNIT ADDRESS CALCULATION UNIT PROGRAM CONTROL UNIT TEST & EMULATION PO/P7 CONTROL 11 8 14 6 16 16 16 16 3 16 16 XA-bus YA-bus ID-bus IA-bus 4 |
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