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EXAMPLE BOARD LAYOUT

(6.99)

(14.17)

(1.91)

(8.33)

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

(10.8)

3X (2.16)

3X (1.07)

(2.54)

(R0.05) TYP

4215105/C 08/2024

TO-263 - 4.83 mm max height

KTT0003B

TRANSISTOR OUTLINE

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:5X

SYMM

1

3

4

NOTES: (continued)

5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers

SLMA002(www.ti.com/lit/slm002) and SLMA004 (www.ti.com/lit/slma004).

6. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented.

OPENING

SOLDER MASK

METAL

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

EXPOSED

METAL

SOLDER MASK

OPENING

SOLDER MASK

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED

METAL