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STA1095 Scheda tecnica(PDF) 77 Page - STMicroelectronics |
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STA1095 Scheda tecnica(HTML) 77 Page - STMicroelectronics |
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77 / 127 page ![]() DS13319 Rev 2 77/127 STA108x, STA109x Electrical Characteristics 126 4.12.2 Timing Requirements for Device Hardware Reset The timing requirements in this section assumes stable power supplies at the assertion of SYSRSTn signal. The assertion of the SYSRSTn signal resets all the device circuitry with the exception of the PMU. The reset signal generated by the PMU is actually put in logical and with the SYSRSTn input. Table 43. Hardware reset timing Symbol Parameter Timing Unit Min. Max. tSYSRSTn SR SYSRSTn low pulse width 1000 - ns |
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