LMKDB1108FS85RKPR datasheet(38/95 Pages) TI2

38 / 95 page

9 Register Maps

9.1 LMKDB1120 and LMKDB1120FS Registers

Table 9-1 lists the memory-mapped registers for the LMKDB1120 and LMKDB1120FS registers. All register

offset addresses not listed in Table 9-1 must be considered as reserved locations and the register contents must

not be modified.

Table 9-1. LMKDB1120 and LMKDB1120FS Registers

Offset

Acronym

Section

Output Enable Control for CLK16 through CLK19

Section 9.1.1

Output Enable Control for CLK0 through CLK7

Section 9.1.2

Output Enable Control for CLK8 through CLK15

Section 9.1.3

OE Pin Readback for CLK5 through CLK12

Section 9.1.4

AOD Enable Control and SBI_EN Readback

Section 9.1.5

Device Info

Section 9.1.6

Device Info (cont.)

Section 9.1.7

SMBus Byte Counter

Section 9.1.8

SBI Mask for CLK0 through CLK7

Section 9.1.9

SBI Mask for CLK8 and CLK15

Section 9.1.10

R10

SBI Mask for CLK16 and CLK19

Section 9.1.11

R11

Output Slew Rate Select MSB for CLK0 through CLK7

Section 9.1.12

R12

Output Slew Rate Select MSB for CLK8 through CLK15

Section 9.1.13

R13

Output Slew Rate Select MSB for CLK16 through CLK19

Section 9.1.14

14h

R20

Output Amplitude

Section 9.1.15

15h

R21

Input Configuration, Save Config in PD, SMB SDATA

Monitoring, and LOS Readback

Section 9.1.16

21h

R33

SBI Mask Readback for CLK0 through CLK7

Section 9.1.17

22h

R34

SBI Mask Readback for CLK8 through CLK15

Section 9.1.18

23h

R35

SBI Mask Readback for CLK16 through CLK19

Section 9.1.19

26h

R38

Non-clearable SMBUS Write Lock

Section 9.1.20

27h

R39

LOS Event Status and Clearable SMBus Write Lock

Section 9.1.21

5Bh

R91

Slew Rate Speed Options 1 and 2 Assignments

Section 9.1.22

5Ch

R92

Slew Rate Speed Options 3 and 4 Assignments

Section 9.1.23

62h

R98

Output Slew Rate Select LSB for CLK0 through CLK7

Section 9.1.24

63h

R99

Output Slew Rate Select LSB for CLK8 through CLK15

Section 9.1.25

64h

R100

Output Slew Rate Select LSB for CLK16 through CLK19

Section 9.1.26

Complex bit access types are encoded to fit into small table cells. Table 9-2 shows the codes that are used for

access types in this section.

Table 9-2. LMKDB1120 and LMKDB1120FS Access

Type Codes

Access Type

Code

Description

Read Type

Read

to Clear

Write Type

Write

LMKDB1102, LMKDB1104, LMKDB1104FS

LMKDB1108, LMKDB1108FS, LMKDB1120, LMKDB1120FS

SNAS855E – NOVEMBER 2023 – REVISED AUGUST 2025

www.ti.com

Submit Document Feedback

Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1120 LMKDB1120FS

LMKDB1108FS85RKPR Scheda tecnica(PDF) 38 Page - Texas Instruments

LMKDB1108FS85RKPR Scheda tecnica(HTML) 38 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95

Scheda tecnica Scarica

Link URL