STPS2L40 datasheet(5/17 Pages) STMICROELECTRONICS

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Figure 5. Normalized avalanche power derating versus

pulse duration (Tj = 125 °C)

(tp)

(10 µs)

ARM

0.001

0.01

0.1

100

1000

t (µs)

Figure 6. Relative variation of thermal impedance junction

to ambient versus pulse duration (SMB)

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.E-02

1.E-01

1.E+00

1.E+01

1.E+02

1.E+03

/ R

th(j-a)

Single pulse

SMB

t (s)

Figure 7. Relative variation of thermal impedance junction

to lead versus pulse duration (SMB flat)

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.E-04

1.E-03

1.E-02

1.E-01

1.E+00

1.E+01

/ R

th(j-l)

Single pulse

SMB Flat

t (s)

Figure 8. Relative variation of thermal impedance junction

to ambient versus pulse duration (SMA Flat)

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.E-02

1.E-01

1.E+00

1.E+01

1.E+02

1.E+03

/ R

th(j-a)

Single pulse

t (s)

SMA Flat / SMA Flat Notch

Figure 9. Reverse leakage current versus reverse voltage

applied (typical values)

1.E-03

1.E-02

1.E-01

1.E+00

1.E+01

1.E+02

I (mA)

VR(V)

Tj = 25 °C

Tj = 125 °C

Figure 10. Junction capacitance versus reverse voltage

applied (typical values)

100

1000

100

C(pF)

V (V)

F=1MHz

=30mV

T =25°C

OSC

RMS

STPS2L40

Characteristics (curves)

DS2146 - Rev 6

page 5/17

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