IS25LE128E-RMLA3:P-TY datasheet(91/197 Pages) ISSI

Il numero della parte	IS25LE128E-RMLA3:P-TY

Spiegazioni elettronici	SERIAL FLASH MEMORY 133/166MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

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IS25LE256E/128E

IS25WE256E/128E

Integrated Silicon Solution, Inc.- www.issi.com

Rev.A9

03/07/2023

Figure 8.26 Quad Input Page Program operation (32h/38h [EXTADD=1] or 34h/3Eh, 4-byte address)

4-byte Address

Instruction = 32h/38h/34h/3Eh

CE #

SCK

High Impedance

...

Mode 3

Mode 0

IO0

IO1

Data In 2

IO2

IO3

...

Data In 1

...

8.12 ERASE OPERATION

The

Erase command sets all bits in the addressed sector or block to “1”s.

The memory array of the device is organized into uniform 4 Kbyte sectors or 32/64/256 Kbyte uniform blocks (a

block consists of eight/sixteen adjacent sectors respectively).

Before a byte is

reprogrammed, the sector or block that contains the byte must be erased (erasing sets bits to “1”).

In order to erase the device, there are three erase instructions available: Sector Erase (SER), Block Erase (BER),

and Chip Erase (CER). A sector erase operation allows any individual sector to be erased without affecting the

data in other sectors. A block erase operation erases any individual block. A chip erase operation erases the whole

memory array of a device. A sector erase, block erase, or chip erase operation can be executed prior to any

programming operation.

IS25LE128E-RMLA3:P-TY Scheda tecnica(PDF) 91 Page - Integrated Silicon Solution, Inc