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TLV6713DDCT Scheda tecnica(PDF) 21 Page - Texas Instruments |
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TLV6713DDCT Scheda tecnica(HTML) 21 Page - Texas Instruments |
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21 / 24 page ![]() www.ti.com PACKAGE OUTLINE C 0.20 0.12 TYP 0.25 3.05 2.55 4X 0.95 1.1 0.7 0.1 0.0 TYP 6X 0.5 0.3 0.6 0.3 TYP 1.9 0 -8 TYP 4X 0 -15 4X 4 -15 A 3.05 2.75 B 1.75 1.45 SOT-23 - 1.1 max height DDC0006A SMALL OUTLINE TRANSISTOR 4214841/E 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC MO-193. 3 4 0.2 C A B 1 6 INDEX AREA PIN 1 GAGE PLANE SEATING PLANE 0.1 C SCALE 4.000 |
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