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TLV9302IDDFR Scheda tecnica(PDF) 28 Page - Texas Instruments |
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TLV9302IDDFR Scheda tecnica(HTML) 28 Page - Texas Instruments |
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28 / 61 page ![]() NC ±IN +IN V± V+ OUTPUT NC NC VS+ VS± GND Ground (GND) plane on another layer VOUT VIN GND Run the input traces as far away from the supply lines as possible RF RG Place components close to device and to each other to reduce parasitic errors Use low-ESR, ceramic bypass capacitor GND Use a low-ESR, ceramic bypass capacitor Figure 10-2. Operational Amplifier Board Layout for Noninverting Configuration V- OUT GND GND GND Figure 10-3. Example Layout for SC70 (DCK) Package TLV9301, TLV9302, TLV9304 SBOS941D – FEBRUARY 2019 – REVISED AUGUST 2021 www.ti.com 28 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TLV9301 TLV9302 TLV9304 |
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