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ADA4356ABCZ Scheda tecnica(PDF) 9 Page - Analog Devices |
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ADA4356ABCZ Scheda tecnica(HTML) 9 Page - Analog Devices |
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9 / 61 page ![]() Data Sheet ADA4356 analog.com Rev. 0 9 of 61 Figure 4. On-Chip LDO Disabled Table 3. CLK, SPI, and Control Specifications (TA = 25°C, VCC = 3.3V, and LDO enabled (see the power scheme shown in Figure 3), unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS CLOCK INPUTS (CLKP AND CLKN) External Clock Frequency 10 1000 MHz Conversion Rate 10 125 MSPS Logic Compliance MOS, LVDSL, VPECL Differential Input Voltage For LVDS and LVPECL 0.2 3.6 Vp-p Input Voltage Range GND − 0.2 VEA + 0.2 V Input Common-Mode Voltage VCM 0.9 V Input Resistance (Differential) RIN,CLK 15 kΩ Input Capacitance CIN,CLK 4 pF SPI CLOCK SCLK Frequency 25 MHz SPI INPUTS (SCLK, CS ̅̅̅̅ , AND SDIO) Input High Voltage VINH 1.2 VEA + 0.2 V Input Low Voltage VINL 0 0.8 V SCLK Input Resistance RIN,SCLK 30 kΩ SCLK Input Capacitance CIN,SCLK 2 pF CS ̅̅̅̅ Input Resistance RIN,CS 26 kΩ CS ̅̅̅̅ Input Capacitance CIN,CS 2 pF VLD VLDEN VCC 3.3V 1.8V IVCC VEA VED ADA4356 LDO |
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