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TUSB8042AI Scheda tecnica(PDF) 24 Page - Texas Instruments |
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TUSB8042AI Scheda tecnica(HTML) 24 Page - Texas Instruments |
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24 / 64 page  7.4.4 SMBus Target Operation When the SMBus interface mode is enabled, the TUSB8042A supports read block and write block protocols as a target-only SMBus device. The TUSB8042A target address is 1000 1xyz, where: • x is the state of GANGED/SMBA2/HS_UP pin at reset, • y is the state of FULLPWRMGMTz/SMBA1/SS_UP pin at reset, and • z is the read/write bit; 1 = read access, 0 = write access. For details on SMBus requirements, refer to the System Management Bus Specification. Note If the TUSB8042A is addressed by a host using an unsupported protocol, the device does not respond. The TUSB8042A waits indefinitely for configuration by the SMBus host and does not connect on the upstream port until the SMBus host indicates configuration is complete by clearing the CFG_ACTIVE bit. TUSB8042A SLLSF93A – JUNE 2019 – REVISED JANUARY 2025 www.ti.com 24 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TUSB8042A |
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