 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
AX99100QF Scheda tecnica(PDF) 55 Page - ASIX Electronics Corporation |
|
|
|||||||||||||||||||||||||||||
AX99100QF Scheda tecnica(HTML) 55 Page - ASIX Electronics Corporation |
|
|
55 / 70 page  55 AX99100 PCIe to Multi I/O Controller Copyright © 2016 ASIX Electronics Corporation. All rights reserved. Power–up/down and Power Management Sequence 4.4 The AX99100 related power up/down and power management sequences are designed to meet the PCI Express Card Electromechanical Specification Revision 2.0. Please reference the section 2.2.1 for power up sequence, section 2.2.2 for power management sequence and section 2.2.3 for power down sequence for the detail in this standard. Note: There is NO power plane separation between 3.3V AUX and VCCIO in AX99100. In D3 Cold, the chip VCCIO and VCC33A_REG should be powered from 3.3V AUX to support remote wake up. |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
