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DM2016N Scheda tecnica(PDF) 7 Page - SDMC Technology Co., Ltd |
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DM2016N Scheda tecnica(HTML) 7 Page - SDMC Technology Co., Ltd |
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7 / 8 page ![]() DM2016 Data sheet V2.2 Sep 04,2008 7 7.3 I 2C Chronograms I 2 C Chronograms I 2 C Characteristics Parameter Symbol Min Max Unit SCL frequency fSCL 400 KHz Bus free time between stop and start tBUF 1.3 µ s Hold time start condition tHD,STA 0.9 µ s SCL low period tLOW 1.3 µ s SCL high period tHIGH 0.9 µ s Setup time before a repeated start tSU,STA 0.9 µ s Data hold time tHD,DAT 0 0.9 µ s Data setup time tSU,DAT 100 ns Rise time for both SDA and SCL signals tR 20 300 ns Fall time for both SDA and SCL signals tF 20 300 ns Setup time before a stop condition tSU,STO 0.9 µ s Capacitive load for each bus line Cb 400 pF |
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