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LM4934 Scheda tecnica(PDF) 12 Page - National Semiconductor (TI) |
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LM4934 Scheda tecnica(HTML) 12 Page - National Semiconductor (TI) |
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12 / 39 page ![]() System Control (Continued) When the part is configured as an I 2C device then the LM4934 will respond to one of two addresses, according to the ADDR input. If ADDR is low then the address portion of the I 2C transaction should be set to write to 0010000. When ADDR is high then the address input should be set to write to 1110000. TABLE 5. Chip Address A6 A5 A4 A3 A2 A1 A0 Chip Address EC EC 10000 ADR = 0 0 0 10000 ADR = 1 1 1 10000 EC — Externally configured by ADR pin www.national.com 12 |
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