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ADCMP564 Scheda tecnica(PDF) 4 Page - Analog Devices

Il numero della parte ADCMP564
Spiegazioni elettronici  Dual, High Speed ECL Comparators
PDF  16 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADCMP564 Scheda tecnica(HTML) 4 Page - Analog Devices

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ADCMP563/ADCMP564
Rev. B | Page 4 of 16
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
AC PERFORMANCE (Continued)
Equivalent Input Rise Time Bandwidth1
BWEQ
0 V to 1 V swing, 2 V/ns
1500
MHz
Maximum Toggle Rate
>50% output swing, 50% duty cycle
800
MHz
Minimum Pulse Width
PWMIN
ΔtPD < 25 ps
700
ps
RMS Random Jitter
VOD = 400 mV, 1.3 V/ns, 312 MHz,
50% duty cycle
1.0
ps
Unit to Unit Propagation Delay Skew
100
ps
POWER SUPPLY
Positive Supply Current
IVCC
@ +5.0 V
2
3.2
5
mA
Negative Supply Current
IVEE
@ −5.2 V
10
19
25
mA
Positive Supply Voltage
VCC
Dual
4.75
5.0
5.25
V
Negative Supply Voltage
VEE
Dual
−4.96
−5.2
−5.45
V
Power Dissipation
PD
Dual, without load
90
120
150
mW
Dual, with load
150
180
230
mW
DC Power Supply Rejection Ratio—VCC
PSRRVCC
85
dB
DC Power Supply Rejection Ratio—VEE
PSRRVEE
85
dB
HYSTERESIS (ADCMP564 Only)
Hysteresis
RHYS = 23.5 kΩ
20
mV
RHYS = 9.0 kΩ
70
mV
Hysteresis Pin Bias Voltage
Referred to AGND
−1
V
Hysteresis Pin Series Resistance
3
1 Equivalent input rise time bandwidth assumes a first-order input response and is calculated by the following formula: BWEQ = 0.22/√(trCOMP
P
2 – trIN2), where tr is the
20/80 input transition time applied to the comparator and tr
is the effective transition time, as digitized by the comparator input.
IN
COMP



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