Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

LM81 Scheda tecnica(PDF) 28 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Il numero della parte LM81
Spiegazioni elettronici  Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
PDF  33 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM81 Scheda tecnica(HTML) 28 Page - National Semiconductor (TI)

Back Button LM81 Datasheet HTML 24Page - National Semiconductor (TI) LM81 Datasheet HTML 25Page - National Semiconductor (TI) LM81 Datasheet HTML 26Page - National Semiconductor (TI) LM81 Datasheet HTML 27Page - National Semiconductor (TI) LM81 Datasheet HTML 28Page - National Semiconductor (TI) LM81 Datasheet HTML 29Page - National Semiconductor (TI) LM81 Datasheet HTML 30Page - National Semiconductor (TI) LM81 Datasheet HTML 31Page - National Semiconductor (TI) LM81 Datasheet HTML 32Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 28 / 33 page
background image
Functional Description (Continued)
13.7 Interrupt Mask Register 2 — Address 44h
Power on default – <7:0> = 0000 0000 binary
Bit
Name
Read/
Write
Description
0
+12Vin
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
1
Vccp2
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
2
Reserved
Read/Write
3
Reserved
Read/Write
4
Chassis Intrusion
Read/Write
A one disables the corresponding interrupt status bit for INT interrupt.
5
Reserved
Read/Write
6
Reserved
Read/Write
7
RESET Enable
Read/Write
<7> = 1 in INT Mask Register 2 enables the RESET in the Configuration Register.
13.8 Reserved Register — Address 45h
Power on default – <7:0> = 00h. Read/Write for backwards compatibility.
13.9 CI Clear Register — Address 46h
Power on default – <7:0> = 0000 0000 binary
Bit
Name
Read/
Write
Description
0-6
Reserved
Read/Write
7
CI Clear
Read/Write
A one outputs a minimum 20 ms active low pulse on the Chassis Intrusion pin. The
register bit self clears after the pulse has been output. This bit is mirrored in
Configuration Register bit 6.
www.national.com
28



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com