L6997D datasheet(6/23 Pages) STMICROELECTRONICS

6 / 23 page

L6997

6/23

DEVICE DESCRIPTION

1.1 Constant On Time PWM topology

Figure 2. Loop block schematic diagram

The device implements a Constant On Time control scheme, where the Ton is the high side MOSFET on time

duration forced by the one-shot generator. The on time is directly proportional to VSENSE pin voltage and in-

verse to OSC pin voltage as in Eq1:

Eq 1

where KOSC = 250ns and τ is the internal propagation delay time (typ. 70ns). The system imposes in steady

state a minimum on time corresponding to VOSC = 1V. In fact if the VOSC voltage increases above 1V the cor-

responding Ton will not decrease. Connecting the OSC pin to a voltage partition from VIN to GND, it allows a

steady-state switching frequency FSW independent of VIN. It results:

Eq 2

where

Eq 3

Eq 4

The above equations allow setting the frequency divider ratio

αOSC once output voltage has been set; note that

such equations hold only if VOSC<1V. Further the Eq2 shows how the system has a switching frequency ideally

independent from the input voltage. The delay introduces a light dependence from VIN. A minimum off-time con-

strain of about 500ns is introduced in order to assure the boot capacitor charge and to limit the switching fre-

Vsense

Vout

Vin

HGATE

LGATE

OSC

Vref

PWM comparator

FFSR

One-shot generator

OSC

SENSE

OSC

----------------------

OUT

---------------

-----------

OSC

OUT

---------------

OSC

---------------

OSC

→

SW KOSC αOUT

OSC

OS C

---------------

--------------------

OUT

---------------

--------------------

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