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LMKDB1108FS85RKPR Scheda tecnica(PDF) 80 Page - Texas Instruments |
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LMKDB1108FS85RKPR Scheda tecnica(HTML) 80 Page - Texas Instruments |
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80 / 126 page ![]() Table 9-91. R12 Register Field Descriptions Bit Field Type Reset Description 7:6 RESERVED R 0h Reserved 5 SBI_CLK_0 R 1h Readback of Side-Band Disable for CLK0 4:2 RESERVED R 0h Reserved 1 SBI_CLK_1 R 1h Readback of Side-Band Disable for CLK1 0 RESERVED R 0h Reserved 9.4.13 R17 Register (Offset = 11h) [Reset = 66h] R17 is shown in Table 9-92. Return to the Summary Table. Table 9-92. R17 Register Field Descriptions Bit Field Type Reset Description 7:4 AMP R/W 6h Global Differential output Control,approximately 0.6V to 1V 25mV/ step (default = 0.75V) 0h = 600mV 1h = 625mV 2h = 650mV 3h = 675mV 4h = 700mV 5h = 725mV 6h = 750mV 7h = 775mV 8h = 800mV 9h = 825mV Ah = 850mV Bh = 875mV Ch = 900mV Dh = 925mV Eh = 950mV Fh = 975mV 3:0 RESERVED R 0h Reserved 9.4.14 R18 Register (Offset = 12h) [Reset = 0Ah] R18 is shown in Table 9-93. Return to the Summary Table. Table 9-93. R18 Register Field Descriptions Bit Field Type Reset Description 7 RX_CLKIN_EN_AC_INPU T R/W 0h Enable receiver bias when CLKIN is AC coupled 0h = DC Coupled Input 1h = AC Coupled Input 6 RX_CLKIN_EN_RTERM R/W 0h Enable termination resistors on CLKIN1 0h = Input termination inactive 1h = Input termination active 5 RESERVED R 0h Reserved 4 SLEWRATE_CTRL_MOD E R 0h Slew rate select preference between pin mode and register mode. 0h = Pin Control 1h = Register Control 3 PD_RESTOREB R 1h Save configuration in powerdown 0h = Config Cleared 1h = Config Saved 2 RESERVED R 0h Reserved LMKDB1102, LMKDB1104, LMKDB1104FS LMKDB1108, LMKDB1108FS, LMKDB1112, LMKDB1120, LMKDB1120FS SNAS855F – NOVEMBER 2023 – REVISED NOVEMBER 2025 www.ti.com 80 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS |
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