4 / 13 page
ComLink™ Series
CY2LL843
Document #: 38-07066 Rev. OBS
Page 4 of 13
TPHZ
Propagation delay, High level to High
impedance output
(see Figure 14)
4
10
nS
TPLZ
Propagation delay, Low level to High
impedance output
4.3
10
nS
TPZH
Propagation delay, high impedance to High
level output
310
nS
TPZL
Propagation delay, high impedance to Low
level output
210
nS
TPHL_skR1_Dx
Channel to Channel skew-receiver 1 to Any
mux related drivers
95
pS
TPLH_skR1_Dx
Channel to Channel skew-receiver 1 to Any
mux related drivers
95
pS
TPPHL_skR2_Dx Channel to Channel skew-receiver 2 to Any
mux related drivers
95
pS
TPLH_skR2_Dx
Channel to Channel skew-receiver 2 to Any
mux related drivers
95
pS
DJ
Deterministic Jitter (100MHz, 25°C,
VID =0.4V, S0, S1 = 0)
(see Figure 7)
PRBS-Differential
95
pS
Table 7. High Frequency Parametrics
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
Fmax
Maximum frequency
VDD = 3.3V
50% duty cycle tW(50–50)
Standard Load Circuit.
400
MHz
Table 6. Differential Receiver to Driver Switching Characteristics Over Recommended Operating Conditions (continued)[[5]]
1A/1B
1Y/1Z
2Y/2Z
2A/2B
Cross
Point
Router
1A/1B
2A/2B
2A/2B
1A/1B
1Y/1Z
2Y/2Z
Splitter A
1Y/1Z
2Y/2Z
Splitter B
S0/S1
S0/S1
1A/1B
2A/2B
2Y/2Z
1Y/1Z
Pass
Thru
Router
S0/S1
S0/S1
Router Options
Splitter Options
Figure 1. Two-channel Cross Point Switch/Mux
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