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LCP1521 Scheda tecnica(PDF) 6 Page - STMicroelectronics

Il numero della parte LCP1521
Spiegazioni elettronici  PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR SLIC PROTECTION
PDF  9 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LCP1521 Scheda tecnica(HTML) 6 Page - STMicroelectronics

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TECHNICAL INFORMATION
Fig. A1: LCP1521 concept behavior.
Figure A1 shows the classical protection circuit using the LCP1521 crowbar concept. This topology
has been developed to protect the new high voltage SLIC’s, it allows to program the negative firing
threshold while the positive clamping value is fixed at GND.
When a negative surge occurs on one wire (L1 for example) a current Ign flows through the base of the
transistor T1 and then injects a current in the gate of the thyristor Th1. Th1 fires and all the surge current
flows through the ground. After the surge when the current flowing through Th1 becomes less negative
than the holding current IH, then Th1 switches off.
When a positive surge occurs on one wire (L1 for example) the diode D1 conducts and the surge current
flows through the ground.
Fig. A2: Example of PCB layout based on LCP1521 protection.
In order to minimize the remaining voltage across the SLIC inputs during the surge, the TIP and RING pins
of the LCP1521 are doubled (Pins 1 and 8 for TIP / Pins 4 and 5 for RING).
This fact allows the board designer to connect the track like designed in figure A2. With such a PCB design,
the extra voltages caused by track stray inductance (LdI / dt) remain located on the line side of the LCP and
do not affects its SLIC side.
The capacitor C is used to speed up the crowbar structure firing during the fast surge edges.
This allows to minimize the dynamical breakover voltage at the SLIC Tip and Ring inputs during fast strikes.
Please note that this capacitor is generally present around the SLIC - Vbat pin.
So to be efficient it has be as close as possible from the LCP1521 Gate pin and from the reference ground
track (or plan) (see Fig. A2). The optimized value for C is 220nF.
To the
line side
To the
SLIC side
GND
V Ring
GND
Gate
TIP
RING
GND
-Vbat
C
Rs1
Rs2
L 1
L 2
VTip
Th1
D1
T1
IG
ID1
LCP1521
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