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STM32F427AI Scheda tecnica(PDF) 141 Page - STMicroelectronics |
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STM32F427AI Scheda tecnica(HTML) 141 Page - STMicroelectronics |
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141 / 240 page  DS9405 Rev 12 141/240 STM32F427xx STM32F429xx Electrical characteristics 197 6.3.18 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 57: I/O static characteristics). Unless otherwise specified, the parameters given in Table 60 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 17. Figure 37. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The external capacitor must be placed as close as possible to the device. 3. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 60. Otherwise, the reset is not considered by the device. Table 60. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit RPU Weak pull-up equivalent resistor(1) VIN = VSS 30 40 50 kΩ VF(NRST)(2) NRST Input filtered pulse - - - 100 ns VNF(NRST)(2) NRST Input not filtered pulse VDD > 2.7 V 300 - - ns TNRST_OUT Generated reset pulse duration Internal Reset source 20 - - µs 1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance must be minimum (~10% order) . 2. Specified by design. ai14132c STM32F RPU NRST(2) VDD Filter Internal Reset 0.1 μF External reset circuit (1) |
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