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STM32F427AI Scheda tecnica(PDF) 145 Page - STMicroelectronics |
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STM32F427AI Scheda tecnica(HTML) 145 Page - STMicroelectronics |
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145 / 240 page ![]() DS9405 Rev 12 145/240 STM32F427xx STM32F429xx Electrical characteristics 197 Figure 38. SPI timing diagram - slave mode and CPHA = 0 Figure 39. SPI timing diagram - slave mode and CPHA = 1 MSv41658V2 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) Last bit IN MSv41659V2 th(SI) tc(SCK) tw(SCKH) tw(SCKL) tsu(NSS) ta(SO) tv(SO) th(NSS) tdis(SO) tsu(SI) NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input First bit OUT Next bits OUT Last bit OUT First bit IN Last bit IN Next bits IN th(SO) |
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