W209C datasheet(13/16 Pages) CYPRESS

Il numero della parte	W209C

Spiegazioni elettronici	Frequency Generator for Integrated Core Logic with 133-MHz FSB

PDF	16 Pages

Scroll/Zoom	100%

Produttore elettronici	CYPRESS [Cypress Semiconductor]

Homepage	http://www.cypress.com

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13 / 16 page

W209C

PRELIMINARY

Document #: 38-07171 Rev. *A

Page 13 of 16

Intel is a registered trademark of Intel Corporation.

Group Skew and Jitter Limits

Output Group

Pin-Pin Skew Max.

Cycle-Cycle Jitter

Duty Cycle

Nom Vdd

Skew, Jitter

Measure

Point

Typical Output

Impedance

CPU

175 ps

250 ps

45/55

2.5V

1.25V

Ω

SDRAM

250 ps

45/55

3.3V

1.5V

Ω

APIC

250 ps

500 ps

45/55

2.5V

1.25V

Ω

48MHz

250 ps

500 ps

45/55

3.3V

1.5V

Ω

3V66

175 ps

500 ps

45/55

3.3V

1.5V

Ω

PCI

500 ps

45/55

3.3V

1.5V

Ω

REF

N/A

1000 ps

45/55

3.3V

1.5V

Ω

Clock Output Wave

2.5V Clocking

3.3V Clocking

Test Point

Test Load

TPERIOD

Duty Cycle

THIGH

2.0

1.25

0.4

TLOW

TRISE

TFALL

TLOW

TRISE

TFALL

TPERIOD

Duty Cycle

THIGH

2.4

1.5

0.4

Output

Buffer

Interface

Figure 8. Output Buffer

Ordering Information

Ordering Code

Package Name

Package Type

W209C

48-pin SSOP (300 mils)

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