AT25DF011 datasheet(49/50 Pages) RENESAS

49 / 50 page

DS-AT25DF011-032 Rev. J

Page 49

2023-11-14

AT25DF011 Datasheet

18. Revision History

Revision Level – Release Date

History

A – April 2014

Initial release. Document posted to public website.

B – October 2014

Corrected last byte address in sections 6, 7.1, and 7.2. Corrected 8S1 and 8MA3 package

outline drawings. Updated IUDPD description in Table 13.3. Corrected product density error

on Ordering Detail diagram.Updated Table 9-1 (Protected Memory Address). Removed tray

shipping option, Updated AC and DC specifications.

C – January 2015

Added Die in Wafer Form (DWF) ordering option.

D – November 2015

Updated IDPD and ISB specification conditions. Updated document status from Preliminary to

Complete.

E – February 2017

Added patent information.Updated description in Section 8.2 (Page Erase). Updated Power-

On Timing description (Section 14.)

F – May 2017

Added clarification of Absolute Maximum Ratings. Added footnote and updated WLCSP

references.

G – December 2021

Updated drawing in Section 17.2.

H – February 2022

Changed company logo to Renesas.

I – March 2022

Removed references to 8-ball WLCSP from document.

J – November 2023

Applied new corporate template to document.

Updated UDFN POD in Section 17.2.

Integrated the AT25DF011-052F-HR Addendum to content.

Modified the text in Section 13.1.

AT25DF011 Scheda tecnica(PDF) 49 Page - Renesas Technology Corp