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M58WT032KT Scheda tecnica(PDF) 9 Page - Numonyx B.V |
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M58WT032KT Scheda tecnica(HTML) 9 Page - Numonyx B.V |
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9 / 117 page ![]() M58WTxxxKT, M58WTxxxKB Description 9/117 The M58WTxxxKT/B feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and locked-down individually preventing any accidental programming or erasure. There is additional hardware protection against program and erase. When VPP ≤VPPLK all blocks are protected against program or erase. All blocks are locked at power-up. The device includes a Protection Register to increase the protection of a system’s design. The Protection Register is divided into two segments: a 64-bit segment containing a unique device number written by Numonyx, and a 128-bit segment one-time-programmable (OTP) by the user. The user programmable segment can be permanently protected. Figure 5 shows the Protection Register memory map. The memory is offered TFBGA88, 8 × 10 mm, 8 × 10 active ball array, 0.8 mm pitch package and is supplied with all the bits erased (set to ’1’). |
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