Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

ZIOL2201 Scheda tecnica(PDF) 31 Page - Renesas Technology Corp

Il numero della parte ZIOL2201
Spiegazioni elettronici  IO-Link Compliant HV Line Driver IC Family
PDF  92 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ZIOL2201 Scheda tecnica(HTML) 31 Page - Renesas Technology Corp

Back Button ZIOL2201 Datasheet HTML 27Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 28Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 29Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 30Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 31Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 32Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 33Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 34Page - Renesas Technology Corp ZIOL2201 Datasheet HTML 35Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 31 / 92 page
background image
ZIOL2xxx Datasheet
© 2016 Integrated Device Technology, Inc.
31
April 26, 2016
• WRITE1: write access to register file (if applicable) or EEPROM, block access only supported with the
access to register file
• COMMAND: Commands to achieve an IC (soft-)reset or up- or download of configuration data
Figure 3.11 illustrates the structure of supported SPI accesses. The in this figure illustrated write access works
only with the IC versions ZIOL2xx1
Figure 3.11 Structure of SPI accesses
ADDR
SHIFT
D0
D...
Dn
DUMMY
SIGNAL Byte
ADDR
SHIFT
D0
D...
Dn
IN
OUT
WRITE
ADDR
SHIFT
DUMMY
-
-
-
SIGNAL Byte
ADDR
SHIFT
D0
D...
Dn
READ
IN
OUT
8 clks
8 clks
8 clks
8 clks
8 clks
8clk
Clock
ADDR=0xFF
CMD
DUMMY
SIGNAL Byte
CMD
COMMAND
IN
OUT
[5:0] Address
[7:6]
Segment
ADDR
R/W
SHIFT
Shift Counter Value
= number of bytes - 1
Signal Byte
All ’0’ = not busy
7
0
7
0
7
0
5
6
ADDR
0 : register file
1 : EEPROM
2 : do not use
3 : do not use
0 : write
1 : read
3.3.8.2.
SPI access details
The timing of the three SPI access types is illustrated in Figure 3.13. As shown in this figure the 1
st byte, which is
called destination byte, is composed out of the segment address (bit 7:6) and the register address (bit 5:0). A
command is always using the address 0xFF which is a not physically implemented memory location within the IC
memory unit.
1 Note: IC versions ZIOL2xx2 do not allow any write access.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com