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M41T256YMT7F Scheda tecnica(PDF) 11 Page - STMicroelectronics |
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M41T256YMT7F Scheda tecnica(HTML) 11 Page - STMicroelectronics |
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11 / 27 page ![]() 11/27 M41T256Y WRITE Mode In this mode the master transmitter transmits to the M41T256Y slave receiver. Bus protocol is shown in Figure 13., page 11. Following the START condition and slave address, a logic '0' (R/ W=0) is placed on the bus and indicates to the ad- dressed device that byte addresses A(0) and A(1) will follow and is to be written to the on-chip ad- dress pointer (MSB of address byte A(0) is a “Don’t care”). The data byte to be written to the memory is strobed in next and the internal address pointer is incremented to the next memory location within the RAM on the reception of an acknowledge bit. The M41T256Y slave receiver will send an ac- knowledge bit to the master transmitter after it has received the slave address (see Figure 10., page 9) and again after it has received each address byte. Figure 13. WRITE Mode Sequence AI04761 BUS ACTIVITY: S P SDA LINE BUS ACTIVITY: MASTER DATA n DATA n+X BYTE ADDRESS (0) SLAVE ADDRESS BYTE ADDRESS (1) |
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