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MPD78C14 Scheda tecnica(PDF) 39 Page - NEC |
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MPD78C14 Scheda tecnica(HTML) 39 Page - NEC |
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39 / 373 page ![]() CHAPTER 1 GENERAL DESCRIPTION 21 CMOS NMOS 1.6 Differences between 87AD Series CMOS and NMOS Products Process Item Product name µPD78C18/78C17/78C14/78C14A/78C12A/ µPD7811/7810 78C11A/78C10A Instructions 159 (STOP instruction added) 158 Special registers 28 (ZCM register added) 27 Standby function 3 modes: HALT mode, software STOP 32-byte data of 256-byte on-chip RAM mode, hardware STOP mode. On-chip retained at low supply voltage (3.2 V). RAM data retained at low supply voltage (2.5 V) in software/hardware STOP mode. HLT instruction states 12 11 HALT mode CPU operation Stopped M3, T2 cycle repetition ALE Low level High level Self-bias control of zero-cross Self-bias control possible (by ZCM register Self-bias control not possible detector specification) NMI/RESET noise elimination By analog delay By clock sampling method A/D converter Operation stoppable Operation not stoppable (VAREF pin manipulation) Operation RD/WR High impedance High level during reset ALE Output PD/PF (ROM-less 0 output to pin specified by address bus. products) Remainder are high impedance. Operating 65 mW Typ. (15 MHz)Note 1 750 mW Typ. Standby 5 µW Typ. 4.8 mW Typ. PackageNote 2 64-pin plastic shrink DIP 64-pin plastic shrink DIP 64-pin plastic QUIP (straight) 64-pin plastic QUIP (straight) 64-pin plastic QUIP 64-pin plastic QUIP 64-pin plastic QFP (bent leads) 68-pin plastic QFJ Pin connection VDD (pin 64) VCC (pin 64) (except QFP & QFJ) STOP (pin 63) VDD (pin 63) Notes 1. 80 mW (15 MHz) on the µPD78C18/78C17/78C14/78C14A. 2. Correspondence between pin connection and pin number depends on the type of package. Caution There are also differences in electrical specifications, oscillator characteristics, and some internal operation timings: These should be noted when directly replacing a µPD7811/7810witha µPD78C18/ 78C17/78C14/78C14A/78C12A/78C11A/78C10A. Power consumption |
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