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29W040 Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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29W040 Scheda tecnica(HTML) 1 Page - STMicroelectronics |
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1 / 31 page ![]() AI02074 19 A0-A18 W DQ0-DQ7 VCC M29W040 G E VSS 8 Figure 1. Logic Diagram M29W040 4 Mbit (512Kb x8, Uniform Block) Low Voltage Single Supply Flash Memory NOT FOR NEW DESIGN M29W040 is replaced by the M29W040B 2.7V to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS FAST ACCESS TIME: 100ns BYTE PROGRAMMING TIME: 12 µs typical ERASE TIME – Block: 1.5 sec typical – Chip: 2.5 sec typical PROGRAM/ERASE CONTROLLER (P/E.C.) – Program Byte-by-Byte – Data Polling and Toggle bits Protocol for P/E.C. Status MEMORY ERASE in BLOCKS – 8 Uniform Blocks of 64 KBytes each – Block Protection – Multiblock Erase ERASE SUSPEND and RESUME MODES LOW POWER CONSUMPTION – Read mode: 8mA typical (at 12MHz) – Stand-by mode: 20 µA typical – Automatic Stand-by mode POWER DOWN SOFTWARE COMMAND – Power-down mode: 1 µA typical 100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION – Defectivity below 1ppm/year ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Device Code: E3h A0-A18 Address Inputs DQ0-DQ7 Data Input / Outputs E Chip Enable G Output Enable W Write Enable VCC Supply Voltage VSS Ground Table 1. Signal Names PLCC32 (K) TSOP32 (N) 8 x 20mm November 1999 1/31 This is information on a product still in productionbut not recommended for new designs. TSOP32 (NZ) 8 x 14mm |
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