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M48Z512A, M48Z512AY

Figure 7. Address Controlled, Read Mode AC Waveforms

Note:

Chip Enable (E) and Output Enable (G) = Low, Write Enable (W) = High.

AI01220

tAXQX

DATA VALID

A0-A18

DQ0-DQ7

tAVAV

tAVQV

Table 9. Read Mode AC Characteristics

Symbol

Parameter

M48Z512A/M48Z512AY

Unit

-70

-85

Min

Max

Min

Max

Read Cycle Time

70

85

ns

(1)

Address Valid to Output Valid

70

85

ns

(1)

Chip Enable Low to Output Valid

70

85

ns

(1)

Output Enable Low to Output Valid

35

45

ns

(2)

Chip Enable Low to Output Transition

5

5

ns

(2)

Output Enable Low to Output Transition

5

5

ns

(2)

Chip Enable High to Output Hi-Z

30

35

ns

(2)

Output Enable High to Output Hi-Z

20

25

ns

(1)

Address Transition to Output Transition

5

5

ns