TPS25751AS datasheet(9/85 Pages) TI2

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6.3.2 TPS25751AS - Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)

PARAMETER

MIN

MAX

UNIT

Input voltage range(1)

VIN_3V3

3.0

3.6

Input voltage range(1)

PP5V

4.9

5.5

Input voltage range(1)

VBUS2

Input voltage range(1)

VSYS

VIO

I/O voltage range(1)

I2Cx_SDA, I2Cx_SCL, I2Cx_IRQ

ADCINx

3.6

GPIOx

5.5

CC1, CC2

5.5

Output current (from PP5V)

VBUS

CC1, CC2

315

Output current (from LDO_3V3)

GPIOx

Output current (from VBUS LDO)

Sum of current from LDO_3V3 and

GPIOx

Operating junction temperature

–40

125

°C

(1)

All voltage values are with respect to network GND. All GND pins must be connected directly to the GND plane of the board.

(2)

Short all VBUS and VBUS_IN pins together.

6.4 Recommended Capacitance

over operating free-air temperature range (unless otherwise noted)

PARAMETER (1)

VOLTAGE RATING

MIN

NOM

MAX

UNIT

CVIN_3V3

Capacitance on VIN_3V3

6.3V

µF

CLDO_3V3

Capacitance on LDO_3V3

6.3V

µF

CLDO_1V5

Capacitance on LDO_1V5

4.5

µF

CVBUS

Capacitance on VBUS(4)

25V

4.7

µF

CPP5V

Capacitance on PP5V

10V

120(2)

µF

CVSYS TPS25751A

Capacitance on VSYS Sink from

VBUS(5)

25V

100

µF

CPPHV TPS25751AD

Capacitance on PPHV Sink from

VBUS(5)

25V

100

µF

CCCy

Capacitance on CCy pins(3)

6.3V

200

400

480

(1)

Capacitance values do not include any derating factors. For example, if 5µF is required and the external capacitor value reduces by

50% at the required operating voltage, then the required external capacitor value is 10µF.

(2)

Minimum capacitance is a requirement from USB PD (cSrcBulkShared). Keep at least 120µF tied directly to PP5V.

(3)

Capacitance includes all external capacitance to the Type-C receptacle.

(4)

The device can be configured to quickly disable the sinking power path upon certain events. When such a configuration is used, a

capacitance on the higher side of this range is recommended.

(5)

USB PD specification for cSnkBulkPd (100µF) is the maximum bulk capacitance allowed on a VBUS sink after a PD contract is in

place. The capacitance is sufficient for all power conversion devices deriving power from the PD Controller sink path. For systems

requiring greater than 100µF, VBUS surge current limiting is implemented as described in the USB3.2 specification.

6.5.1 TPS25751AD - Thermal Information

THERMAL METRIC1

TPS25751AD

UNIT

QFN (REF)

38 PINS

RθJA

Junction-to-ambient thermal resistance

(sinking through PP_HV)

57.4

°C/W

www.ti.com

TPS25751A

SLVSJG7 – MAY 2026

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