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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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ST7LITE1XB Scheda tecnica(PDF) 52 Page - STMicroelectronics |
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ST7LITE1XB Scheda tecnica(HTML) 52 Page - STMicroelectronics |
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52 / 157 page  ST7LITE1xB 52/157 I/O PORTS (Cont’d) Analog alternate function Configure the I/O as floating input to use an ADC input. The analog multiplexer (controlled by the ADC registers) switches the analog voltage present on the selected pin to the common analog rail, connected to the ADC input. Analog Recommendations Do not change the voltage level or loading on any I/O while conversion is in progress. Do not have clocking pins located close to a selected analog pin. WARNING: The analog input voltage level must be within the limits stated in the absolute maxi- mum ratings. 10.3 I/O PORT IMPLEMENTATION The hardware implementation on each I/O port de- pends on the settings in the DDR and OR registers and specific I/O port features such as ADC input or open drain. Switching these I/O ports from one state to anoth- er should be done in a sequence that prevents un- wanted side effects. Recommended safe transi- tions are illustrated in Figure 33. Other transitions are potentially risky and should be avoided, since they may present unwanted side-effects such as spurious interrupt generation. Figure 33. Interrupt I/O Port State Transitions 10.4 UNUSED I/O PINS Unused I/O pins must be connected to fixed volt- age levels. Refer to Section 13.8. 10.5 LOW POWER MODES 10.6 INTERRUPTS The external interrupt event generates an interrupt if the corresponding configuration is selected with DDR and OR registers and if the I bit in the CC register is cleared (RIM instruction). Related Documentation AN 970: SPI Communication between ST7 and EEPROM AN1045: S/W implementation of I2C bus master AN1048: Software LCD driver 01 floating/pull-up interrupt INPUT 00 floating (reset state) INPUT 10 open-drain OUTPUT 11 push-pull OUTPUT XX = DDR, OR Mode Description WAIT No effect on I/O ports. External interrupts cause the device to exit from WAIT mode. HALT No effect on I/O ports. External interrupts cause the device to exit from HALT mode. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt External interrupt on selected external event - DDRx ORx Yes Yes 1 |
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