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M58BF008 Scheda tecnica(PDF) 9 Page - STMicroelectronics |
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M58BF008 Scheda tecnica(HTML) 9 Page - STMicroelectronics |
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9 / 36 page ![]() 9/36 M58BF008 Table 6. Commands Code Command 02h Overlay Block Erase Set-up 04h Overlay Block Program Set-up 06h Overlay Block Read Enable/ Disable 0Dh Overlay Block Erase Confirm 20h Erase Set-up 30h Wrap/No-wrap Burst Toggle 40h Program Set-up 50h Clear Status Register 60h Asynchronous/Synchronous Read Toggle 70h Read Status Register 90h Read Electronic Signature B0h Program/Erase Suspend D0h Program/Erase Resume or Erase Confirm FFh Read Memory Array INSTRUCTIONS AND COMMANDS The Instructions are listed in Tables 6 and 7. They may be broadly divided into two types, those that access or modify the memory content and those that toggle a mode or function. The Instructions that access or modify the memory content include: – Read Memory Array (RD) – Read Status Register (RSR) and Clear Status Register (CLRS) – Read Electronic Signature (RSIG) – Erase (EE) and Overlay Block Erase (OBEE) – Program (PG) and Overlay Block Program (OB- PG) – Program or Erase Suspend (PES) and Program or Erase Resume (PER) The Instructions that toggle a mode or function in- clude: – Asynchronous/Synchronous Read mode Tog- gle (ART) – Wrap/No-wrap Burst mode Toggle (WBT) – Overlay Block Enable/Disable function Toggle (OBT) Instructions are written, in one or more write cy- cles, to the memory Command Interface (C.I.) for decoding. The Command Interface is reset to Read Memory Array at power-up, when exiting from power-down. Any invalid sequence of com- mands will also reset the Command Interface to Read Memory Array. A Program/Erase Controller (P/E.C.) handles all the timing and verifies the correct execution of the Program or Erase instructions. The P/E.C. has a Status Register which monitors the operations and which may be read at any time during program or erase. The Status Register bits indicate the oper- ation and exit status of the internal algorithms. The VPP Program and Erase Supply Voltage must be within the range VPP1 or VPPH for programming or erasure. If VPP out of range, the program or erase algorithms do not start and Status Register bit VPP Status VPPS will be set to ’1’. |
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