Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

ST72681/R21 Scheda tecnica(PDF) 25 Page - STMicroelectronics

Il numero della parte ST72681/R21
Spiegazioni elettronici  USB 2.0 high-speed Flash drive controller
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72681/R21 Scheda tecnica(HTML) 25 Page - STMicroelectronics

Back Button ST72681/R21 Datasheet HTML 21Page - STMicroelectronics ST72681/R21 Datasheet HTML 22Page - STMicroelectronics ST72681/R21 Datasheet HTML 23Page - STMicroelectronics ST72681/R21 Datasheet HTML 24Page - STMicroelectronics ST72681/R21 Datasheet HTML 25Page - STMicroelectronics ST72681/R21 Datasheet HTML 26Page - STMicroelectronics ST72681/R21 Datasheet HTML 27Page - STMicroelectronics ST72681/R21 Datasheet HTML 28Page - STMicroelectronics ST72681/R21 Datasheet HTML 29Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 25 / 32 page
background image
ST72681
Electrical characteristics
25/32
Figure 16.
Typical VDD33-VOH vs. VDD33 (I/O D8)
7.8
Control pin characteristics
7.8.1
Asynchronous RESET pin
TA = 0 to +55 °C unless otherwise specified.
Figure 17.
Typical RON on RESET pin
0
20
40
60
80
100
120
140
160
180
02
468
10
Ioh (mA)
Table 22.
RESET pin characteristics
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
VIL
Input low level voltage (1)
1.
The level on the RESET pin must be free to go below the VIL max. level specified in Section 7.8.1:
Asynchronous RESET pin. Otherwise the reset will not be taken into account internally.
0.16 x
VDD33
V
VIH
Input high level voltage
0.85 x
VDD33
Vhys
Schmitt trigger voltage hysteresis1)
450
mV
RON
Pull-up equivalent resistor
VDD33 = 3.3V
20
40
80
k
Ω
VDD33 = 2V
100
teh(RSTL)
External reset pulse hold time (2)
2.
To guarantee the reset of the Device, a minimum pulse has to be applied to the RESET pin. All short
pulses applied on RESET pin with a duration below teh(RSTL) can be ignored. Not tested in production,
guaranteed by design.
2.5
µs
tg(RSTL)
Filtered glitch duration (3)
3.
The reset network protects the device against parasitic resets.
200
ns
tew(RSTL) External reset pulse duration
(4)
4.
The external reset duration must respect this timing to guarantee a correct start-up of the internal regulator
at power-up. Not tested in production, guaranteed by design.
500
µs
tiw(RSTL)
Internal reset pulse duration
2
tCPU
40
50
60
70
80
90
100
2
2.5
3
3.5
Vdd (V)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com