DIO74506

Version 1.0, May 2026

www.dioo.com

© 2026 Dioo Microcircuits Co., Ltd. Jiangsu

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8. Function Description

8.1. Level translator

The bidirectional level translator transfers data between the I/O supply domains of the host and the memory

card. An automatic direction-sensing mechanism determines the data flow direction, allowing signals to be

translated either from the memory card to the host in read mode or from the host to the memory card in

write mode. The translator supports the clock and data rates defined by the SD 3.0 specification.

Table 1. Supported mode

Bus Speed Mode

Signal Level (V)

Clock Rate (MHz)

Data Rate (MB/s)

Default-speed

3.3

25

12.5

High-speed

3.3

50

25

SDR12

1.8

25

12.5

SDR25

1.8

50

25

SDR50

1.8

100

50

SDR104

1.8

208

104

DDR50

1.8

50

50

8.2. Enable and direction control

The device includes an auto-enable function. When VCCB rises above 1.55 V, the level translator is enabled

automatically. When VCCB falls below 0.65 V, the memory-card-side drivers and the level translator are

disabled. All host-side pins, except CLKA, are configured as inputs with a 70 kΩ pull-up to VCCA.

The device features an auto-direction control mechanism for all data channels except CLK. The direction

control logic automatically senses the data flow direction and configures the output drivers accordingly,

eliminating the need for the host interface to explicitly indicate the direction of data transfer.

8.3. Feedback clock channel

The clock signal is transmitted from the host to the memory card. Propagation delay introduced by the level

translator and PCB traces can reduce timing margin on data read back from the card, particularly at higher

data rates. To compensate for this delay, a feedback clock path is implemented. This approach leverages

the fact that the clock always originates from the host, while the timing-critical read data path is driven by

the memory card.

8.4. EMI filter

All input and output driver stages incorporate EMI filtering to reduce interference with sensitive mobile

communication circuits.

8.5. ESD protection

The device provides robust ESD protection on all memory-card pins. The internal architecture protects the

host interface by directing ESD stress to supply ground through the level translator.