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AS7343

Datasheet

• PUBLIC

DS001046

• v6-00 • 2023-Jun-07

│ 21

The device is controlled and monitored by registers accessed through the I²C serial interface. These

registers provide device control functions and can be read to determine device status and acquire

device data.

The register set is summarized below. The values of all registers and fields that are listed as reserved

or are not listed must not be changed at any time. Two-byte fields are always latched with the low byte

followed by the high byte. The

“Name” column illustrates the purpose of each register by highlighting

the function associated to each bit. The bits are shown from MSB (D7) to LSB (D0). GRAY fields are

reserved and their values must not be changed at any time.

In order to access registers from 0x58 to 0x66 bit REG_BANK in register CFG0 (0xBF) needs to be

set to “1”. For register access of registers 0x80 and above bit REG_BANK needs to be set to “0”.

10.1

Figure 20:

Addr

Name

<D7>

<D6>

<D5>

<D4>

<D3>

<D2>

<D1>

<D0>

0x58

AUXID

AUXID [3:0]

0x59

REVID

REVID [2:0]

0x5A

ID [7:0]

0x66

CFG12

SP_TH_CH [2:0]

0x80

ENABLE

FDEN

SMUXE

WEN

SP_EN

PON

0x81

ATIME

ATIME [7:0]

0x83

WTIME

WTIME [7:0]

0x84

SP_TH_L

SP_TH_L_LSB [7:0]

0x85

SP_TH_L_MSB [7:0]

0x86

SP_TH_H

SP_TH_H_LSB [7:0]

0x87

SP_TH_H_MSB [7:0]

0x93

STATUS

ASAT

AINT

FINT

SINT

0x94

ASTATUS

ASAT_

STATU

AGAIN_STATUS [3:0]

0x95

DATA_0

DATA_0_L [7:0]

0x96

DATA_0_H [7:0]

0x97

DATA_1

DATA_1_L [7:0]

0x98

DATA_1_H [7:0]

0x99

DATA_2

DATA_2_L [7:0]

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