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R5F564MLGDLC Scheda tecnica(PDF) 70 Page - Renesas Technology Corp |
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R5F564MLGDLC Scheda tecnica(HTML) 70 Page - Renesas Technology Corp |
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70 / 162 page ![]() R01DS0173EJ0120 Rev.1.20 Page 70 of 162 Oct 20, 2022 RX64M Group 2. Electrical Characteristics Note 1. Supply current values are with all output pins unloaded and all input pull-up MOSs in the off state. Note 2. Supply of the clock signal to peripheral modules is stopped in this state. This does not include operations as BGO (background operations). Note 3. ICC depends on f (ICLK) as follows. (ICLK/PCLKA:PCLKB/PCLKC/PCLKD:BCLK:BCLK pin = 10:5:10:5 when EXTAL = 12 MHz) D-version ICC Max. = 0.77 × f + 18 (max. operation in high-speed operating mode) ICC Typ. = 0.08 × f + 6 (normal operation in high-speed operating mode) ICC Typ. = 0.50 × f + 2.6 (low-speed operating mode 1) ICC Max. = 0.36 × f + 18 (sleep mode) G-version ICC Max. = 0.77 × f + 27 (max. operation in high-speed operating mode) ICC Typ. = 0.08 × f + 6 (normal operation in high-speed operating mode) ICC Typ. = 0.50 × f + 2.6 (low-speed operating mode 1) ICC Max. = 0.36 × f + 27 (sleep mode) Note 4. This does not include operations as BGO (background operations). Whether supply of the clock signal to peripheral modules continues or is stopped only depends on the state determined by the settings of the bits in module stop control registers A to D. The setting for the peripheral module clock stopped state is FCLK = BCLK = PCLKA = PCLKB = PCLKC = PCLKD = BCLK pin = 3.75 MHz (division by 64). Note 5. This is the increase for programming or erasure of the code flash memory (limitations apply to the combinations of ranges in which writing proceed) or data flash memory during program execution in the code flash memory. Note 6. The low power consumption function is disabled and DEEPCUT[1:0] = 01b. Note 7. The low power consumption function is enabled and DEEPCUT[1:0] = 11b. |
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