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RZ/G2UL Scheda tecnica(PDF) 12 Page - Renesas Technology Corp |
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RZ/G2UL Scheda tecnica(HTML) 12 Page - Renesas Technology Corp |
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12 / 67 page ![]() RZ/G2UL Group 1. Overview R01DS0486EJ0110 Rev.1.10 Page 12 of 67 Jun 16, 2025 1.2 Block Diagram The LSI internal bus of this LSI consists of the ACPU bus, MCPU bus, and system bus. Figure 1.1 shows the configuration of the buses. ACPU bus: A bus connected to Cortex-A55, DDR memory controllers, image processing units, and Storage and Network MCPU bus: A bus connected to Cortex-M33 and serial interface units System bus: A bus connected to the control registers of each unit |
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