R5F5671CDGLE datasheet(82/179 Pages) RENESAS

82 / 179 page

R01DS0373EJ0120 Rev.1.20

Page 82 of 179

Sep 30, 2024

RX671 Group

2. Electrical Characteristics

2.3

DC Characteristics

Note 1. This does not include the pins, which are multiplexed as ports for 5 V tolerant.

Note 2. P07, P12 to P17, P20, P21, P30 to P33, P67, P73, PC0 to PC3, and PJ3 are 5 V tolerant.

Table 2.4

DC Characteristics (1)

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,

Ta = Topr

Item

Symbol

Min.

Typ.

Max.

Unit

Test

Conditions

Schmitt trigger

input voltage

IRQ input pin*1

MTU input pin*1

POE3 input pin*1

TPU input pin*1

TMR input pin*1

CMTW input pin*1

SCI input pin*1

RSCIA input pin*1

CAN input pin*1

CAC input pin*1

ADTRG# input pin*1

QSPIX input pin*1

SSIE input pin*1

REMC input pin*1

RES#, NMI, TCK

VIH

0.8 × VCC

—

VIL

—

0.2 × VCC

ΔVT

0.06 × VCC

—

RIIC input pin

RIICHS input pin

(except for SMBus)

VIH

0.7 × VCC

—

VIL

—

0.3 × VCC

ΔVT

0.05 × VCC

—

TAMPIn/RTCICn pin

EXCIN pin

VIH

0.8 × VBKP

——

VIL

—

0.2 × VBKP

Ports for 5 V tolerant*2

VIH

0.8 × VCC

—

VIL

—

0.2 × VCC

Other input pins excluding ports

for 5 V tolerant

VIH

0.8 × VCC

—

VIL

—

0.2 × VCC

High level input

voltage

(except for Schmitt

trigger input pin)

MD pin, EMLE

VIH

0.9 × VCC

—

EXTAL, RSPI input pin,

RSPIA input pin,

EXDMAC input pin, WAIT#,

SDHI input pin

0.8 × VCC

—

D0 to D15

0.7 × VCC

—

RIIC, RIICHS (SMBus)

2.1

—

Low level input

voltage

(except for Schmitt

trigger input pin)

MD pin, EMLE

VIL

—

0.1 × VCC

EXTAL, RSPI input pin,

RSPIA input pin,

EXDMAC input pin, WAIT#,

SDHI input pin

—

0.2 × VCC

D0 to D15

—

0.3 × VCC

RIIC, RIICHS (SMBus)

—

0.8

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