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RZ/N2L Scheda tecnica(PDF) 86 Page - Renesas Technology Corp |
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RZ/N2L Scheda tecnica(HTML) 86 Page - Renesas Technology Corp |
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86 / 128 page ![]() Table 2.35 SPI timing (2 of 2) Conditions: VOH = VCC33 × 0.5, VOL = VCC33 × 0.5, C = 30 pF Parameter Symbol Min.*1 Max.*1 Unit*1 Reference figure Slave access time tSA — 12 ns Figure 2.68, Figure 2.69 Slave output release time tREL — 12 ns Note 1. tSPIcyc: PCLKSPIn cycle Note 2. SPCKD set value + 1 (1 to 8) Note 3. SSLND set value + 1 (1 to 8) Note 4. SSLND set value + 2 (2 to 9) RSPCKn master select output tSPcyc tSPCKWH tSPCKr VOH VOH VOL VOL VOH tSPCKWL SPI tSPCKf VOL RSPCKn slave select input tSPcyc tSPCKWH tSPCKr VIH tSPCKWL tSPCKf (n = 0 to 3) VIH VIL VIL VIH VOH VIH VIL VOH = VCC33 - 0.5 V, VOL = 0.4 V, VIH = 2.4 V, VIL = 0.8 V Figure 2.65 SPI clock timing SSLn0 to SSLn3 output tLEAD SPI tSSLr, tSSLf RSPCKn CPOL = 1 output (n = 0 to 3) tLAG tTD RSPCKn CPOL = 0 output tSU tH MSB IN DATA LSB IN MSB IN MISOn input MOSIn output MSB OUT tDr, tDf tOH DATA tOD LSB OUT MSB OUT IDLE Figure 2.66 SPI timing (Master, Motorola SPI, CPHA = 0) RZ/N2L Datasheet 2. Electrical Characteristics R01DS0397EJ0140 Rev.1.40 Mar 31, 2026 Page 86 of 128 |
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