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24FC08 Scheda tecnica(PDF) 5 Page - Microchip Technology |
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24FC08 Scheda tecnica(HTML) 5 Page - Microchip Technology |
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5 / 49 page ![]() 2002-2021 Microchip Technology Inc. DS20001710N-page 5 24AA08/24LC08B/24FC08 FIGURE 1-1: BUS TIMING DATA 15 TOF Output Fall Time from VIH Minimum to VIL Maximum —250 ns 2.5V ≤ VCC ≤ 5.5V (Notes 1, Note 3 and Note 4) —250 ns 1.7V ≤ VCC <2.5V (24AA08) (Notes 1, Note 3 and Note 4) 16 TSP Input Filter Spike Suppression (SDA and SCL pins) —50 ns Note 1 — 100 ns 1.7V ≤ VCC ≤ 5.5V (24FC08) (Note 1) 17 TWC Write Cycle Time (byte or page) —5 ms 18 Endurance 1,000,000 — cycles +25°C, 5.5V, Page Mode (Note 4) TABLE 1-2: AC CHARACTERISTICS (CONTINUED) AC CHARACTERISTICS (Continued) Industrial (I): TA = -40°C to +85°C, VCC = +1.7V to +5.5V Extended (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V (24LC08B) Extended (E): TA = -40°C to +125°C, VCC = +1.7V to +5.5V (24FC08) Param. No. Symbol Characteristic Min. Max. Units Conditions Note 1: Characterized but not 100% tested. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. 3: CB = total capacitance of one bus line in pF. 4: This parameter is not tested but ensured by characterization. (unprotected) (protected) SCL SDA IN SDA OUT WP 5 7 6 16 3 2 89 13 D3 4 10 11 12 14 |
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