TYNX08RG datasheet(4/10 Pages) STMICROELECTRONICS

4 / 10 page

TN8, TS8 and TYNx08 Series

4/10

Figure 3: Average and D.C. on-state current

versus ambient temperature (device mounted

on FR4 with recommended pad layout) (DPAK)

Figure

Relative

variation

thermal

impedance junction to case versus pulse

duration

Figure

Relative

variation

thermal

impedance junction to ambient versus pulse

duration (recommended pad layout, FR4 PC

board for DPAK)

Figure 6: Relative variation of gate trigger

current and holding current versus junction

temperature for TS8 series

Figure 7: Relative variation of gate trigger

current and holding current versus junction

temperature for TN8 & TYN08 series

Figure 8: Relative variation of holding current

versus

gate-cathode

resistance

(typical

values) for TS8 series

100

125

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

(A)

T(AV)

(°C)

amb

α = 180°

D.C.

1E-3

1E-2

1E-1

1E+0

0.1

0.2

0.5

1.0

K=[Z

th(j-c)

th(j-c)]

t (s)

1E-2

1E-1

1E+0

1E+1

1E+2

5E+2

0.01

0.10

1.00

K=[Z

th(j-a)

th(j-a)]

t (s)

DPAK

TO-220AB / IPAK

-40

-20

100

120

140

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

T (°C)

I,I ,I [T ] /

GT H L

,I ,I [T =25°C]

GT H L

IGT

IH & I

R= 1k

Ω

-40

-20

100

120

140

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

T (°C)

I,I ,I [T ] /

GT H L

,I ,I [T =25°C]

GT H L

IGT

IH & IL

1E-2

1E-1

1E+0

1E+1

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

R(k )

Ω

I [R

] / I [

=1k ]

HGK

Ω

RGK

Tj = 25°C

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