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74HC2G08DP Scheda tecnica(PDF) 7 Page - Nexperia B.V. All rights reserved |
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74HC2G08DP Scheda tecnica(HTML) 7 Page - Nexperia B.V. All rights reserved |
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7 / 15 page ![]() © Nexperia B.V. 2017. All rights reserved 74HC_HCT126 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 1 December 2015 7 of 15 Nexperia 74HC126; 74HCT126 Quad buffer/line driver; 3-state 11. Waveforms and test circuit Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Input (nA) to output (nY) propagation delays Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. Enable and disable times Table 8. Measurement points Type Input Output VM VM VX VY 74HC126 0.5VCC 0.5VCC 0.1VCC 0.9VCC 74HCT126 1.3 V 1.3 V 0.1VCC 0.9VCC |
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